Schedule

Total hours: 9 hours.

• Class 1: Monday 13/3, 14:00hs to 17:00hs
• Class 2: Tuesday 14/3, 14:00hs to 17:00hs
• Class 3: Wednesday 15/3, 14:00hs to 17:00hs

Short Program

Intelligent edge systems constitute a key growth segment within the cloud-backed cognitive IoT marketplace. The Efficient Programmability Of Cognitive Heterogeneous Systems (“EPOCHS”) research project is driven by the specific edge application domain of connected autonomous vehicles (CAVs).

EPOCHS, sponsored by DARPA’s Domain-Specific System-on-Chip (DSSoC) program, is focused on developing agile software-hardware design methodologies for the complex systems-on-chip (SoCs) that are expected to power future CAVs. Such SoCs must meet stringent power, real-time performance, reliability, security and safety criteria in order to qualify for deployment in the field.

General purpose processor cores, supported by carefully selected accelerators are needed to meet the performance and efficiency requirements. Such heterogeneity at the hardware processing level immediately points to challenges in user-level programmability. Designing such software-hardware co-designed systems in an agile manner (with a small team) is another key challenge. In this 3-session course, we present the EPOCHS agile design methodology from a full-stack perspective, including the CAV application, system software (compiler and scheduler), and the underlying SoC (hardware) design.

The EPOCHS agile design methodology consists of a series of procedural steps that start with the EPOCHS Reference Application (ERA) all the way down to the final SoC implementation. The ERA code (representative of the connected, smart car application domain referred to above), system software (compiler and scheduler), and hardware design toolset are open source and publicly available.

EPOCHS Demo: https://youtu.be/NXzZOX5Ukiw

Objetives

In this course, participants will obtain a broad vision of the end-to-end process for the design of latest-generation systems on a chip (SoCs) for domain-specific applications, through the software required for their programming and use. The focus of these classes is the ‘‘programmability’’ (ease of programming and use) of such systems through the presentation and use of different software tools, including: an application from the domain of connected autonomous cars, an advanced compiler, and a smart task scheduler. In addition, participants will get an introductory understanding of basic concepts of hardware design and domain-specific accelerators, the building blocks of SoC design.

Topics:

Taking advantage of these tools, we present a course which is structured in three 3-hour sessions, as follows:

Class 1:

* EPOCHS project introduction by its Principal Investigator, Dr. Pradip Bose (IBM Research).
* EPOCHS agile design methodology presentation.
* Introduction to the key EPOCHS components:
    * EPOCHS Reference Application (ERA), compiler, “smart” scheduler, and SoC.
* Hands-on tutorial 1: EPOCHS Reference Application (ERA).

Class 2:

* Hands-on tutorial 2: Heterogeneous Parallel Virtual Machine (HPVM) compiler.
* Hands-on tutorial 3: Smart scheduler.

Class 3:

* Hands-on tutorial 4: SoC (hardware) design and implementation using the open SoC Embedded Scalable Platform (ESP).
* EPOCHS demo presentation.
* Discussion of collaboration opportunities and concluding remarks.